Tasks
Hardware version
WTI400 v1.2 — In service on the test vessel (~1,000 sea miles). Live task list for the WTI400 V1.2 hardware revision and the next-version (V1.3 and V2.0) backlog. The board has been working in service for over a year; most verification tasks are quantitative bench measurements that haven't been performed against the in-service installation. Underlying data: tasks.json — hand-maintained, edited as work progresses.
Every actionable task for WTI400 V1.2 — verification work against the current hardware + the next-version (V1.3 / V2.0) backlog — across all four product domains (hardware, firmware, housing, compliance). Click a row to expand details; click a column header to sort; hover any badge for help. See Legend below for full field meanings, or Editing workflow for how to update entries.
113
Total
4
Done
0
In progress
109
To do
0
Blocked
0
Deferred
By kind:Verification 79Next version 34
By category:Hardware 109Compliance 4
Status:Kind:Category:Sub-circuit / module:
| Kind ▲ | Category | Sub-circuit / module | Task / description | Status | Date | Result | |
|---|---|---|---|---|---|---|---|
| Verification v1.2 | Hardware | Button Input | Boot-state pull-down Power the board with no firmware running. Measure BUTTON; pass if LOW (≤ 0.4 V). Note: this is the current expected behaviour but is flagged for review in V1.3. | To do | — | — | |
| Verification v1.2 | Hardware | Button Input | Debounce effectiveness Connect an oscilloscope to U10 output and press SW1 rapidly several times. Pass if no more than one LOW transition per press is visible at U10 output. | To do | — | — | |
| Verification v1.2 | Hardware | Button Input | ESD protection present Verify D7 is fitted and oriented correctly (cathode toward input node, anode toward GNDREF path). Visual inspection; pass if D7 marking matches silkscreen. | To do | — | — | |
| Verification v1.2 | Hardware | Button Input | Input logic levels With SW1 open, measure BUTTON at U10 output. Pass if ≥ 2.0 V (logic HIGH). Press and hold SW1; pass if ≤ 0.4 V (logic LOW). | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | Bleed resistor Remove supply; measure VSC discharge time. Pass if VSC reaches < 1 V in approximately 4.4 s (R42 × 44 µF). | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | EMI filter ripple Scope VSC with a 65 mA load. Pass if supply ripple is below the LMR51610 VIN ripple tolerance. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | F1 thermal proximity to D11 Run an IEC 61000-4-5 surge sequence and confirm F1 body temperature stays below 70 °C post-surge. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | Filter capacitance at bias Measure C33, C36, C37, C39 at 12 V DC bias. Record actual values and compare against derated filter corner frequency calculations. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | L2 cold-start inrush Confirm peak current through L2 at power-on stays below the 2.6 A saturation rating. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | Normal operation Apply 12 V; measure VSC. Pass if VSC ≈ 11.5 V. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | OVP hysteresis After trip, slowly reduce supply voltage. Pass if VSC recovers cleanly at a voltage measurably below the trip point. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | OVP trip Slowly raise supply voltage. Pass if VSC drops to 0 V between 17.5 V and 19.5 V with no oscillation at the threshold (verified at 18.6 V on prototypes). | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | PTC fuse Short VSC briefly. Pass if F1 trips and the board powers up again without intervention after the fault clears. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | Reverse polarity Apply −12 V to NET-S. Pass if VSC remains at 0 V and no components become warm. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Bus Power | Surge Apply an ISO 7637-2 Pulse 5b transient (or bench equivalent) to NET-S. Pass if VSC remains stable and all components survive. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Transceiver | Bus fault survivability Apply a brief over-voltage to CANH / CANL at J2. Pass if U9 clamps and U5 survives. The 4 V clamp-vs-spec margin must be characterised before any production run. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Transceiver | Bus idle — recessive state With TWAI_EN LOW, measure CANH and CANL at J2. Pass if both sit at approximately 2.5 V. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Transceiver | Receive on live network Connect to an NMEA 2000 network, capture traffic with a CAN analyser. Pass if frames are received at 250 kbps with no error frames. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Transceiver | Transceiver enable Assert TWAI_EN HIGH. Pass if U5 enters normal mode with no bus disturbance visible on a scope. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Transceiver | Transmit on live network Send a test PGN. Pass if the frame appears on the network and is acknowledged by another node. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Transceiver | TWAI loopback Configure the TWAI peripheral in self-test / loopback mode and transmit a frame. Pass if received without error. | To do | — | — | |
| Verification v1.2 | Hardware | CAN Transceiver | TXD default Before TWAI is initialised, measure TXD at U5 pin 1. Pass if HIGH (R15 holding recessive). | To do | — | — | |
| Verification v1.2 | Hardware | ESP32 Module | C<sub>bus</sub> measurement Measure SCL / SDA rise time at 400 kHz. Pass if t<sub>r</sub> ≤ 300 ns. If C<sub>bus</sub> exceeds 35 pF (the threshold for 400 kHz with 10 kΩ pull-ups), reduce R3 / R4 to 4.7 kΩ before enabling Fast mode (tracked as a V1.3 backlog item). | To do | — | — | |
| Verification v1.2 | Hardware | ESP32 Module | EN release timing Trigger on VCC rising; capture ESP_EN. Pass if ESP_EN crosses 2.48 V ≥ 10 ms after VCC reaches 3.0 V. | To do | — | — | |
| Verification v1.2 | Hardware | ESP32 Module | I2C rise time Capture SDA / SCL transitions during normal Standard-mode (100 kHz) operation. Record 30 %-to-70 % t<sub>r</sub> and infer C<sub>bus</sub>. Pass if t<sub>r</sub> ≤ 1000 ns. | To do | — | — | |
| Verification v1.2 | Hardware | ESP32 Module | VCC rail under Wi-Fi TX Probe at U3 pad 2 during a sustained 802.11b TX burst. Pass if the rail stays within ±3 % of 3.30 V with no individual dip below 3.10 V. | To do | — | — | |
| Verification v1.2 | Hardware | LED Indicator | Blue on / off Drive LED_BLU LOW; pass if blue illuminates. Drive HIGH; pass if blue extinguishes. | To do | — | — | |
| Verification v1.2 | Hardware | LED Indicator | Brightness balance Illuminate each channel in turn at the corrected resistor values. Measure Vf across each LED die and record actual operating current. Assess perceived brightness; pass if no channel appears more than 2× brighter than the others. | To do | — | — | |
| Verification v1.2 | Hardware | LED Indicator | Fail-safe states Cycle power several times. Pass if red always illuminates before firmware asserts control and green / blue never flicker on during boot. | To do | — | — | |
| Verification v1.2 | Hardware | LED Indicator | Green on / off Drive LED_GRN LOW; pass if green illuminates. Drive HIGH; pass if green extinguishes. | To do | — | — | |
| Verification v1.2 | Hardware | LED Indicator | Power-good indication Apply VCC with no firmware running. Pass if red illuminates immediately and green and blue remain off. | To do | — | — | |
| Verification v1.2 | Hardware | LED Indicator | Red off Run firmware that asserts LED_RED HIGH. Pass if red extinguishes completely. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | 38400 baud framing Apply NMEA 0183 HS pattern at 38400 baud. Pass if framing is captured cleanly. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | 4800 baud framing Apply 4800 baud test pattern on J3 pin 3. Pass if framing is captured cleanly on UART RX with no framing errors. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Bus idle Pass if ST_RX ≈ VCC (≥ 2.9 V). | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Bus pulled low Pull J3 pin 3 to GND via 1 kΩ. Pass if ST_RX ≤ 0.4 V. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | D8 static current at 16 V Measure D8 zener leakage and continuous dissipation at V_bus = 16 V. Pass if dissipation ≤ 200 mW. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Default-disabled Assert ST_EN HIGH (or leave undriven), measure ST_SIG. Pass if ST_SIG = VST (≈ 12 V via R33). | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Dropout Apply 9 V to J3 pin 1. Pass if VST ≈ 8.1 V (dropout) and ST_RX still responds to bus signal with LED current ≥ 2.9 mA. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Dropout LED current Measure VST and I_LED at V_bus = 9 V. Pass if I_LED ≥ 2.0 mA and no missed transitions. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Enable, asserted Assert ST_EN LOW, ST_TX LOW. Pass if ST_SIG < 50 mV. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Enable, idle Assert ST_EN LOW, ST_TX HIGH. Pass if ST_SIG = VST and Q6 not conducting. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | NMEA 0183 listener load Measure input current at J3 pin 3 = 2.0 V. Pass if ≤ 2.0 mA. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Nominal supply Apply 12 V to J3 pin 1 with pin 2 to GND. Pass if VST = 12.0 ± 0.5 V. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Reverse polarity Apply −12 V on pin 1, GND on pin 2. Pass if VST = 0 V and no component failure. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Rise time at 4800 baud Toggle ST_TX at 4800 baud and scope the rising edge at ST_SIG. Pass if edge reaches ≥ 80 % of VST within 50 µs. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Rise time at 9600 baud Toggle ST_TX at 9600 baud after the C47 rework. Pass if edge reaches ≥ 80 % of VST within 30 µs. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Surge survivability Apply 58 V transient on ST_SIG (clamped by upstream TVS). Pass if no gate-driver or Q6 damage. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Swapped pins Apply 12 V with pin 1 and pin 2 swapped. Pass if VST = 0 V and no component failure. | To do | — | — | |
| Verification v1.2 | Hardware | Legacy Serial Interface | Top of range Apply 16 V to J3 pin 1. Pass if VST regulates at 12.0 ± 0.5 V and U14 junction ΔT < 2 °C. | To do | — | — | |
| Verification v1.2 | Hardware | Motion Sensor | Fast-mode robustness Verify stable communication at 400 kHz. Pass if no I2C NACK errors occur over 1000 consecutive transactions. If failures occur, reduce R3 / R4 from 10 kΩ to 4.7 kΩ on the `esp32_module` sheet (tracked as a V1.3 backlog item on the ESP32 Module page). | To do | — | — | |
| Verification v1.2 | Hardware | Motion Sensor | I2C device detection Scan the I2C bus. U1 must respond at address 0x6A. Pass if the `WHO_AM_I` register (0x0F) returns `0x6A`. | To do | — | — | |
| Verification v1.2 | Hardware | Motion Sensor | Live data output Configure accelerometer and gyroscope at 52 Hz, read 10 consecutive samples. Pass if all six axes produce non-zero readings, with the accelerometer Z axis showing approximately ±1 g at rest. | To do | — | — | |
| Verification v1.2 | Hardware | Motion Sensor | Register round-trip Write a known value to a writable register (e.g. CTRL1_XL at 0x10) and read it back. Pass if the read value matches. | To do | — | — | |
| Verification v1.2 | Hardware | Motion Sensor | VDD supply ripple Measure VDD at U1 pin 8 with a 100 MHz oscilloscope under normal I2C polling load. Pass if ripple is below 50 mV peak-to-peak. | To do | — | — | |
| Verification v1.2 | Hardware | Motion Sensor | Zero-g and zero-rate offset characterisation Capture accelerometer and gyroscope readings on a stationary board after reflow. Compare against TN0018 expectations to confirm the V1.2 land-pattern fix has eliminated the V1.1 thermomechanical stress. | To do | — | — | |
| Verification v1.2 | Hardware | PCB Markings & Compliance | Compliance-mark legibility Validated; marks survive open-deck installation. | Done | 2026-05-27 | Validated in service | |
| Verification v1.2 | Hardware | PCB Markings & Compliance | Pick-and-place fiducial recognition Validated through V1.2 production assembly. | Done | 2026-05-27 | Validated on V1.2 production | |
| Verification v1.2 | Hardware | PCB Markings & Compliance | QR-code URL resolution Validated on the V1.2 boards in service. | Done | 2026-05-27 | Validated in service | |
| Verification v1.2 | Hardware | Power Supply | Input current at Wi-Fi TX Measure VSD-side current at U2 VIN during a sustained 802.11b TX burst (11 Mbps). Pass if mean current is within 130–170 mA at VSD = 12 V. | To do | — | — | |
| Verification v1.2 | Hardware | Power Supply | L1 thermal at sustained load Touch-probe L1 case after 10 min of continuous Wi-Fi TX at 85 °C ambient. Pass if case is below ~80 °C. | To do | — | — | |
| Verification v1.2 | Hardware | Power Supply | Output ripple at Wi-Fi TX burst Probe VCC at TP1 with a 100 MHz scope (low-inductance ground, ≤ 5 mm tip-to-tip), sustained 802.11b TX. Pass if peak-to-peak ripple at the 400 kHz fundamental is below 50 mV. | To do | — | — | |
| Verification v1.2 | Hardware | Power Supply | Output voltage accuracy Measure VCC at TP1 with no Wi-Fi activity. Pass if 3.30 V ± 2 % (3.234–3.366 V). | To do | — | — | |
| Verification v1.2 | Hardware | Power Supply | SW-node snubber decision Probe SW with a 500 MHz scope (low-inductance ground spring). Pass without snubber if peak ringing is < ~1 V above V_in; otherwise populate R13 + C10. | To do | — | — | |
| Verification v1.2 | Hardware | Power Supply | U2 IC temperature at sustained Wi-Fi TX Run continuous 802.11b TX for 10 min at 85 °C enclosure ambient. Pass if U2 case temperature stays below ~95 °C (Tj ≈ 111 °C internal). | To do | — | — | |
| Verification v1.2 | Hardware | Power Supply | VCC vs 3v3 SMPS output, at Wi-Fi TX Probe both sides of FB1 simultaneously during a Wi-Fi TX burst. Pass if the digital VCC side shows visibly reduced HF ripple compared with the SMPS-output side. | To do | — | — | |
| Verification v1.2 | Hardware | Programming Socket | D4 back-feed check Power the board from its own SMPS only, with the programmer disconnected. Probe J1 pin 2 (V_PROG). Pass if pin 2 measures < 0.1 V (any voltage above this indicates leakage through D4 or contamination). | To do | — | — | |
| Verification v1.2 | Hardware | Programming Socket | End-to-end programming via ESP-PROG Flash a known firmware image at 921600 baud over the standard ESP-PROG adapter and cable. Pass if the image flashes cleanly, the device boots, and Wi-Fi associates. (Confirmed working on WTI400 V1.2 and MDD400 V2.9.) | Done | 2026-05-27 | Confirmed working on WTI400 V1.2 and MDD400 V2.9 | |
| Verification v1.2 | Hardware | Programming Socket | Pogo-pin fixture programming Once the pogo-pin fixture exists, verify end-to-end flashing through it using the board's own VCC for the programming session. Confirm no contamination, no over-stress, and matching pinout to the J1 THT pad footprint. | To do | — | — | |
| Verification v1.2 | Hardware | Programming Socket | U4 thermal soak during programming Hold the SoC in ROM download mode while the programmer drives sustained UART traffic for 60 s. Probe U4 body temperature with a contact thermocouple and record peak. Pass if peak ≤ 95 °C in a 70 °C ambient (≥ 30 °C Tj margin). | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | ADC range characterisation Rotate vane through full 360°, log raw WIND_X / WIND_Y ADC counts. Identify clipping bearings and quantify atan2 reconstruction error. Decision point: if clipping is unacceptable, reduce R50/R51 (Rf) in a V2.0 spin; if acceptable, document the angular error budget for firmware compensation. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | atan2 zero-angle calibration Hold vane at 0°, 90°, 180°, 270° (referenced to a marked heading). Record firmware-reported angle. Document zero offset and maximum reconstruction error across all four quadrants. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | Inter-channel crosstalk 1 kHz, 1 V_pk on WIND_X with WIND_Y open. Pass if < 1 LSB of 1 kHz content appears on WIND_Y. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | LP2951 thermal soak 30 min run at VSC = 14.8 V, JP1 6v8, 30 mA load. Record package temperature. Pass if estimated Tj stays below 110 °C at 40 °C ambient. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | Speed pulse PPR calibration Drive anemometer at measured RPM, log WIND_SPD ISR rate, confirm 2 PPR (Raymarine spec), derive firmware calibration constant. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | VAS rail voltage Confirm 8.65 V (8v4) / 6.89 V (6v8) at the LP2951 output pad under each load condition. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | VSENSE voltage at P HIGH Reed switch open, transducer connected. Expected ~3.0–3.3 V. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | WIND_8V rail at J5 under load Measure at the connector tab at JP1 8v4, transducer connected and rotating. Expected 8.30 V at 25 mA. Repeat at JP1 6v8 → expected 6.54 V at 25 mA. | To do | — | — | |
| Verification v1.2 | Hardware | Wind Interface | WND_EN / WND_ERR handshake Verify VAS is off at boot, enables when WND_EN is driven low, asserts WND_ERR low when the cable is disconnected (transducer absent). | To do | — | — | |
| Next version v1.3 | Hardware | Button Input | R31 pull-down direction R31 currently holds BUTTON LOW during boot, which reads as a button press. A weak pull-up (e.g. 100 kΩ) to VCC would hold BUTTON HIGH (not-pressed = idle) during boot — the correct safe default. Review whether any pull resistor is needed at all given U10's push-pull output. Also eliminates the ~0.33 mA continuous drain that R31 currently causes. | To do | — | — | |
| Next version v1.3 | Compliance | CAN Bus Power | D11 sourcing for production Qualify a Littelfuse or STMicro equivalent SM8S36CA for CE / ABYC certification; the current FUXINSEMI part is suitable for prototype but not preferred for production compliance. | To do | — | — | |
| Next version v1.3 | Hardware | CAN Bus Power | L2 / L3 body spacing Current edge-to-edge gap is 1.95 mm — 0.05 mm short of the 2 mm keepout. Increase in next layout revision. | To do | — | — | |
| Next version v1.3 | Hardware | CAN Bus Power | Over-temperature disconnect Add a 2-component mod: a normally-closed thermal switch in series between R26 and GNDREF plus a 100 kΩ pull-up from Q2's gate to source. Switch placement must be adjacent to the hottest component (Q2 or L2 / L3). | To do | — | — | |
| Next version v1.3 | Hardware | CAN Bus Power | OVP threshold margin at temperature At 85 °C the OVP threshold reaches 15.1 V — only 300 mV above the 14.8 V NMEA 2000 maximum. Either raise the 25 °C trip point (decrease R28 or increase R27) or replace the divider-only comparator with a voltage reference for temperature-stable operation. | To do | — | — | |
| Next version v1.3 | Hardware | CAN Transceiver | C29 population decision Resolve DNP status after EMC testing; either populate or remove the footprint. | To do | — | — | |
| Next version v1.3 | Compliance | CAN Transceiver | NMEA 2000 certification The physical layer meets ISO 11898-2, but formal NMEA 2000 certification has not been pursued. Required before any commercial release. | To do | — | — | |
| Next version v1.3 | Hardware | CAN Transceiver | Relocate C18 / C19 Move C18 / C19 adjacent to U5 pin 3 to reduce VCC bypass trace from ~2.5 mm to ≤ 0.5 mm, per the SN65HVD234 datasheet. | To do | — | — | |
| Next version v1.3 | Hardware | CAN Transceiver | TWAI_TX damping footprint No series resistor is fitted on TXD. Add a DNP 0603 footprint to allow evaluation at bring-up without a board respin. | To do | — | — | |
| Next version v1.3 | Hardware | ESP32 Module | Reduce I2C pull-ups for Fast-mode capability If firmware needs 400 kHz I2C, drop R3 / R4 to 4.7 kΩ to widen the C<sub>bus</sub> margin from 35 pF up to ~75 pF. | To do | — | — | |
| Next version v1.3 | Hardware | ESP32 Module | Shorten the ESP_EN routing V1.2 has a 57.1 mm ESP_EN trace from J1 through R9 / C7 to U3 pad 3 (EN). The signal is RC-limited and the trace is acceptable as-is, but the route picks up board noise before the SoC is active. Re-route R9 / C7 closer to U3's EN pad to bring the trace below the 50 mm guideline. | To do | — | — | |
| Next version v1.3 | Hardware | LED Indicator | R10 and R11 correction R11 must change from 220 Ω to 1 kΩ and R10 from 220 Ω to 270 Ω before the next fabrication run. Rework existing prototypes by hand and verify brightness balance at bring-up. | To do | — | — | |
| Next version v1.3 | Hardware | LED Indicator | R12 (red) balance review With R11 corrected to 1 kΩ, re-verify red vs green / blue balance and adjust R12 if needed. | To do | — | — | |
| Next version v1.3 | Hardware | LED Indicator | Verify Vf at operating point The resistor calculations use Vf estimated from the V-A curve at low current. Measure actual Vf at operating current on the reworked prototype and refine resistor values if predicted balance is not achieved. | To do | — | — | |
| Next version v2.0 | Hardware | Legacy Serial Interface | C23 bypass distance Add a dedicated 100 nF 0603 bypass adjacent to U6 pin 6 (currently 9.4 mm away). | To do | — | — | |
| Next version v1.3 | Hardware | Legacy Serial Interface | C47 rework: 2.2 nF → 820 pF Update the schematic BOM and rework all assembled V1.2 units. Component value change only (0603 C0G footprint unchanged). Restores rise-time-assist effectiveness at 4800 baud on long cables and adds 9600 baud capability. | To do | — | — | |
| Next version v1.3 | Hardware | Legacy Serial Interface | C49 / C50 schematic part-number fix KiCAD schematic lists the wrong manufacturer P/N (GRM188R71H104KA93D, 100 nF) for C49 / C50; assembled BOM value (100 pF) is correct. Metadata-only fix in the schematic. | To do | — | — | |
| Next version v1.3 | Hardware | Legacy Serial Interface | C58 and C54 bypass distance C58 is 7.70 mm from U14 VIN; C54 is 5.46 mm from U14 VOUT. Both exceed the ≤ 2 mm guideline. If VST oscillation is observed under transient load at bring-up, rework both caps to within 2 mm of U14 pins. | To do | — | — | |
| Next version v2.0 | Hardware | Legacy Serial Interface | D8 proximity Relocate D8 to within 3 mm of the ST_SIG isolation via for better transient suppression (currently 10.7 mm). | To do | — | — | |
| Next version v2.0 | Hardware | Legacy Serial Interface | Dedicated VCC bypass at U7 Add a 100 nF 0603 adjacent to U7 VCC pin (pin 6). | To do | — | — | |
| Next version v2.0 | Hardware | Legacy Serial Interface | Guard ring around U6 isolation gap Add an unconnected guard trace if conformal coating is not applied; reduces ionic creepage risk in marine salt-spray. | To do | — | — | |
| Next version v2.0 | Hardware | Legacy Serial Interface | HS NMEA 0183 TX support Robust 38400 baud TX requires a redesigned rise-time-assist stage (e.g. constant-current source) — not achievable with a simple C47 value change. | To do | — | — | |
| Next version v2.0 | Compliance | Legacy Serial Interface | PCB creepage slot Evaluate adding a milled slot at the U7 / U8 isolation boundary if CE / MED certification is pursued. | To do | — | — | |
| Next version v2.0 | Hardware | Legacy Serial Interface | Replace J3 with M12 3-pin waterproof connector M12 A-code or B-code, panel-mount, IP67, field-wireable; the SeaTalk I pin assignment (power / ground / signal) maps directly. | To do | — | — | |
| Next version v1.3 | Hardware | Motion Sensor | Interrupt routing for algorithm timing INT1 and INT2 are currently unconnected. If the compensation algorithm requires precise interrupt-driven sample timing, route INT1 to a spare ESP32 GPIO in the next PCB revision. | To do | — | — | |
| Next version v1.3 | Hardware | Motion Sensor | ODR adequacy for velocity algorithm Once the masthead-velocity compensation algorithm is designed, verify that 52 Hz provides sufficient temporal resolution for accurate integration. The LSM6DSL supports ODR up to 6664 Hz; increasing requires only a firmware register change. | To do | — | — | |
| Next version v1.3 | Compliance | PCB Markings & Compliance | Compliance test reports The CE, UKCA, and FCC marks on the silkscreen indicate the device is designed for compliance with the corresponding standards. The actual *test reports* that authorise affixing those marks are part of the V1.3 compliance pre-screening campaign (CISPR 32 conducted emissions, FCC Part 15 radiated, RED 2014/53/EU harmonised standards, NMEA 2000 conformance). The marks should not be affixed on production boards until the test reports are signed off. | To do | — | — | |
| Next version v1.3 | Hardware | PCB Markings & Compliance | Copyright year update Refresh S8 to the V1.3 production year if it differs from 2025. | To do | — | — | |
| Next version v1.3 | Hardware | PCB Markings & Compliance | Re-scan QR code URL Confirm the deployed URL still matches the silkscreen QR on the V1.3 PCB before fabrication. | To do | — | — | |
| Next version v1.3 | Hardware | Power Supply | Switch L1 to production BOM Move from Fenghua FNR5040S220MT (prototype stock) to Bourns SRN5040TA-220M (production); same footprint, ~+0.4–0.5 % efficiency improvement and a guaranteed SRF spec. | To do | — | — | |
| Next version v1.3 | Hardware | Power Supply | Switch U2 to LMR51610XDRGR (DRG package, exposed pad) If higher MCU or peripheral current budgets are anticipated. DRG θJA = 48 °C/W vs DBV's 148 °C/W gives ~18 °C of additional thermal headroom at the same dissipation. | To do | — | — | |
| Next version v1.3 | Hardware | Programming Socket | Shorten the ESP_EN routing V1.2 has a 57.1 mm ESP_EN trace from J1 through R9 / C7 to U3 pad 3 (EN). Re-route R9 / C7 closer to U3's EN pad to bring the trace below the 50 mm guideline. (Also tracked on the ESP32 Module page.) | To do | — | — | |
| Next version v2.0 | Hardware | Wind Interface | Re-prioritise the F.Cu GND_WIND zone to priority 16 Currently 15, same as GNDREF unnamed fill, so domain separation is enforced by zone priority rather than the clearance rule alone. | To do | — | — | |
| Next version v2.0 | Hardware | Wind Interface | Tie R48 (and R53 mirror) to WIND_8V instead of VCC Rescale R47/R48 so V_bias tracks the JP1 setpoint. Centres V_out at the ADC mid-range at *both* setpoints, enabling B&G 213 (and similar 6.5 V Hall-bias transducers) on the same hardware. | To do | — | — |
Click any row to expand assignee, dependencies, notes and evidence links. Click any column header to sort. A ⛓ badge next to status indicates the task has dependencies — green = all done, red = some still open.
Legend
Kind
- Verification — bring-up test against the current hardware revision. Pulled from each circuit-design page's
## Testing & Verificationadmonition under Hardware bring-up / Conditional. - Next version — design / rework item targeted at a future hardware revision. The badge includes the target version (e.g.
v1.3orv2.0). WTI400 has a handful of items targeting V2.0 as longer-term redesigns — the M12 wind-transducer connector, the U12 amplifier-bias rework, the legacy-serial IEC 60747-5-5 creepage slot. Pulled from each circuit-design page's## Testing & Verificationadmonition under For V1.3... / For V2.0... / Before next production run....
Category
- Hardware — work against the assembled PCB (most of the current list).
- Firmware — integration / regression test that needs the hardware running. (None yet in this list; the existing wind-firmware lineage from the MLI400 V1.0 predecessor and V1.2 in-service tuning isn't broken out as tasks here.)
- Housing — IP-rating, mechanical fit, drop, vibration, environmental test. (None yet.)
- Compliance — CISPR 32 conducted, FCC Part 15 radiated, RED 2014/53/EU harmonised standards, NMEA 2000 conformance, etc.
Status
- To do — not yet attempted.
- In progress — being worked on now.
- Done — completed with a recorded result.
- Blocked — can't proceed (waiting on parts, equipment, or upstream dependency).
- Deferred — intentionally postponed to a later campaign or version.
- N/A — no longer relevant (e.g. superseded by a design change).
Dependency chain (⛓ badge)
The ⛓ badge next to a status indicates the task has upstream dependencies. Green = all dependencies are done. Red = some dependencies are still open (the task may need to wait). Expand the row to see the dependency list with each upstream task's status inline.
Editing workflow
Update the JSON file alongside the task execution:
- Change
statusto"in_progress"while working, then"done"when complete. - Fill in
date_completed(ISO format, e.g."2026-06-15") andresult(free-text — e.g."3.302 V — within spec"or"Failed at 250 mA — see notes"). - Add
notesfor unexpected behaviour, observations, lessons learned. - Add
assigneeif it's a delegated task (free-text — operator or team name). - Add
dependencies(array of upstream task IDs) if the task can't start until other items complete. - Add
evidenceURLs for scope captures, photos, or log files (relative paths to/assets/bringup/wti400-v1.2/<task-id>.pngwork; external URLs also work).
How this list is maintained
The list is hand-maintained. It was seeded once from each circuit-design page's ## Testing & Verification :::caution admonition — the Hardware bring-up / Conditional bullets became kind: "verification" tasks; the For V1.3... / For V2.0... / Before next production run... bullets became kind: "next-version" tasks with the appropriate target_version.
When a circuit page gains a new bullet, add a matching entry to tasks.json. When a circuit page bullet is reworded, update the matching entry's description to stay in sync. The hardware-repo backlog files (v1.3-improvements.md, v2.0-improvements.md in WTI400/PCB/WTI400_V1.2/) remain the canonical narrative for next-version rationale; this page is the live state tracker.