Skip to main content

PCB Markings & Compliance

PCB markings schematic — full sheet (silkscreen labels block, fiducials block, PCB stackup block). Zoom and pan freely; per-sub-section zoomed views appear below.
Hardware version

MDD400 v2.9 — Fabricated prototype. The silkscreen marks, fiducials, and stackup documented here are as-built on the V2.9 prototype boards. Compliance-mark content is locked (the marks themselves correspond to the EU RED 2014/53/EU, FCC Part 15, UKCA, RoHS, and China EFUP regulatory frameworks the MDD400 is targeted at), but final compliance-test confirmation (the test report that authorises affixing the CE / UKCA / FCC marks) is itself a V2.10 milestone — see the V2.10 backlog below.

Overview

This page documents the PCB-level markings on pcb_markings.kicad_sch: the fiducial markers that support automated assembly, the silkscreen marks that carry product identity and compliance information, and the PCB stackup that physically realises the four-layer construction described elsewhere in the docs.

Three sub-sections on this page, in narrative order:

  1. Silkscreen marks and compliance — board identity (S1), CE / UKCA / FCC / RoHS / China EFUP compliance marks (S2 / S7 / S4 / S3), Scadys logo (S5), product-documentation QR code (S6), copyright (S8).
  2. Fiducial markers — four 0.5 mm bare-copper fiducials (FID1–FID4) supporting pick-and-place machine-vision alignment on both sides of the board.
  3. PCB stackup detail — the layer-by-layer construction, copper weights, dielectric thicknesses, and surface finish.

The fourth engineer-drawn rectangle on this sheet is an empty placeholder.

Some board-level mechanical details (board outline, mounting hole positions) live in the MDD400_V2.9.kicad_pcb file rather than on pcb_markings.kicad_sch — they're summarised in the Mounting and board outline section below.

Functional specification and design objectives

The board markings, fiducials, and stackup must:

  • carry the regulatory marks required by the target markets — EU RED 2014/53/EU (CE), UK Conformity Assessed (UKCA), FCC Part 15 (USA), RoHS (EU restricted-substances), and China EFUP (Environment Friendly Use Period);
  • carry the manufacturer identity (Scadys logo + copyright) and the product identity (board variant + revision), with the variant / revision in copper for wear-resistant traceability;
  • provide a machine-readable pointer (QR code) from the physical board to the live product documentation;
  • provide reference markers for the pick-and-place machine's vision system so it can compensate for board-to-board placement variation and skew, with a wide diagonal baseline so small absolute fiducial-detection error translates to a small angular correction error across the whole board;
  • mirror the F.Cu fiducials on B.Cu at the same XY coordinates so single-pass setup works for two-sided assembly;
  • realise a four-layer construction giving two signal layers (F.Cu, B.Cu) and two inner layers (In1.Cu, In2.Cu) for power and ground distribution, with inner layers heavier (1 oz / 35 µm) than outer layers (0.5 oz / 17.5 µm) for low-resistance power planes; and
  • hold a total board thickness of 1.6 mm — standard for marine enclosures and compatible with the panel-mount housing geometry — while letting layer roles change region-by-region so the SMPS, CAN-bus power, digital, and isolation domains each get a stack-up that suits them.

Board specification

ParameterValue
PCB dimensions95.2 × 95.2 mm (non-rectangular outline — see Mounting and board outline below)
Board thickness1.6 mm
Layer count4 (F.Cu / In1.Cu / In2.Cu / B.Cu)
Copper weight17.5 µm (0.5 oz) — F.Cu, B.Cu; 35 µm (1 oz) — In1.Cu, In2.Cu
Surface finishENIG (Electroless Nickel Immersion Gold)
Solder maskNavy blue, both sides; 0.012 mm thickness; pad-to-mask clearance 0.075 mm
Min trace / spacePer design rules in the KiCAD project
Manufacturing classIPC-6012 Class 2

Silkscreen marks and compliance

Silkscreen labels sub-section — board identity (S1), CE mark (S2), RoHS / China EFUP (S3), FCC mark (S4), Scadys logo (S5), QR code (S6), UKCA mark (S7), copyright (S8).

All marks listed below are silkscreen unless noted. They sit on the F.Cu (top) and / or B.Cu (bottom) silkscreen layers.

RefMarkFootprintPurpose / placement
S1MDD400_v2.9 board identitymdd400:VariantBoard identity in copper for version traceability — survives silkscreen wear
S2CE markSILKS:CE_3.5mmEU Declaration of Conformity (Directive 2014/53/EU Radio Equipment Directive) — applied after the V2.10 compliance pre-screening
S3RoHS + China EFUPSILKS:EFUP_RoHS_China_4RoHS compliance (EU restricted substances) and China EFUP (Environment Friendly Use Period — "4" = 4-year mark)
S4FCC markSILKS:FCC_3.5mmFCC Part 15 compliance identifier (US RF emissions). The full FCC ID is carried by the ESP32-S3-WROOM-1 module's own marking (2AC7Z-ESP32S3WROOM1) since the module's pre-certification covers the MDD400's RF emissions
S5Scadys logoSILKS:scadys_logo_10x10.f-maskManufacturer logo, 10 × 10 mm, F.Mask layer — visible through the soldermask aperture
S6Product-docs QR codemdd400:qr_docs.scadys.io_products_mdd400_10Machine-readable link from the physical board to the product docs at docs.scadys.io
S7UKCA markSILKS:UKCA_3.5mmUK Conformity Assessed mark (post-Brexit UK market replacement for CE on UK-only batches)
S8CopyrightSILKS:Copyright© 2025 GM Consolidated Holdings Pty Ltd

Why FCC ID isn't on the board directly. The ESP32-S3-WROOM-1 module carries its own FCC ID label on the module itself (visible through the module's metal can window). The board-level FCC mark (S4) is the generic Part 15 compliance identifier; the device-specific FCC ID for the MDD400 is the same as the module's because the module's pre-certification covers the device's RF emissions (subject to the antenna keep-out documented on the ESP32 Module page).

Why both CE and UKCA marks are present. Post-Brexit, the UK market requires UKCA rather than CE marking on goods placed on the UK market specifically. The MDD400 carries both so a single fabrication run can serve both EU and UK markets — the compliance test reports themselves are technically equivalent (both based on the same harmonised standards under different statutory instruments).

Mark permanence.

MarkVisible onPermanence
S1 board identityCopper (not silkscreen)Permanent — copper etch survives field handling and solder wash
S2 CE, S4 FCC, S7 UKCAF.Cu silkscreenStandard silkscreen — durable in field use, may wear under prolonged direct contact
S3 RoHS / EFUPF.Cu silkscreenSame
S5 Scadys logoF.Mask apertureVisible through soldermask opening; very durable
S6 QR codeF.Cu silkscreenCritical that the QR remains legible — survives operator wear under normal helm conditions
S8 CopyrightF.Cu silkscreenStandard silkscreen

Fiducial markers

Fiducial markers sub-section — FID1 / FID2 on F.Cu, FID3 / FID4 on B.Cu (mirrored at the same XY positions), supporting pick-and-place machine-vision alignment.

Four 0.5 mm bare-copper fiducial markers (with 1.5 mm soldermask openings) form two mirrored pairs:

RefLayerPosition (mm)Pair
FID1F.Cu(71.0, 47.0)Front, top-left pair (mirrors with FID3)
FID2F.Cu(157.0, 133.0)Front, bottom-right pair (mirrors with FID4)
FID3B.Cu(71.0, 47.0)Back, co-located with FID1
FID4B.Cu(157.0, 133.0)Back, co-located with FID2

The diagonal between FID1 / FID2 centres is √(86² + 86²) ≈ 121.6 mm — a wide baseline that gives the pick-and-place's angular-correction calculation low sensitivity to fiducial-detection noise. A 50 µm placement uncertainty at each fiducial translates to roughly ±0.024° of angular correction error — well below the 0.5° typical pick-and-place placement tolerance.

The mirrored front / back placement at identical XY coordinates means the same vision-system fixturing can index both sides without re-teaching coordinates — saves setup time on two-sided assembly runs.

ParameterValueNotes
Fiducial copper diameter0.5 mmPer IPC-7351 Class 2 recommendation
Soldermask opening1.5 mm3× copper diameter — sufficient for vision-system contrast
Diagonal baseline (FID1 → FID2)~121.6 mmWide baseline → low angular-error sensitivity
F/B co-location accuracy0 µm (by design)FID1 / FID3 and FID2 / FID4 share the same XY in the .kicad_pcb
Vision-system suitabilityConfirmed by prior production runsSame fiducial pattern used on prior MDD400 hardware revisions through pick-and-place assembly

PCB stackup detail

PCB stackup sub-section — 4-layer construction (F.Cu / In1.Cu / In2.Cu / B.Cu) with copper weights and dielectric layers.

The physical stack-up, from top to bottom:

Layer#TypeThicknessDielectric belowNotes
F.Cu1Signal + plane17.5 µm (0.5 oz)F.Cu prepregComponent side; carries VCC pour in the digital region, GNDREF moat fills under SMPS / CAN-power / isolation islands
In1.Cu2Power plane35 µm (1 oz)CoreUnbroken GNDREF in the digital region (one half of the VCC plane pair); GNDREF moat inside the SMPS island
In2.Cu3Power plane35 µm (1 oz)B.Cu prepregUnbroken GNDREF in the digital region (other half of the plane pair); domain-dependent fills elsewhere
B.Cu4Signal + plane17.5 µm (0.5 oz)Back-of-board; carries VCC pour in the digital region (mirrors F.Cu), GNDREF fills under SMPS / CAN-power / isolation islands

The VCC – GNDREF – GNDREF – VCC layer ordering across the digital region creates two distributed VCC↔GNDREF plane-pair capacitors (F.Cu↔In1.Cu and In2.Cu↔B.Cu, each separated by 0.1855 mm prepreg). The plane-pair capacitance is what gives the digital domain GHz-frequency bypass with no parasitic ESL or ESR — see the Power Supplies page for the full rationale and the ESP32 Module page for the force-commutated discrete-cap topology that hands off to the plane pair above the discrete caps' self-resonance.

In the SMPS and CAN-bus power islands, all four layers carry GNDREF inside a copper-keepout moat that contains switching return currents.

Across isolation boundaries (CAN domain to digital domain; legacy-serial domain to digital domain), all four layers carry copper-free 1.4 mm creepage gaps.

The stackup specification has been validated by prior MDD400 hardware revisions in production through pick-and-place assembly. No quantitative impedance / capacitance measurements have been re-taken on V2.9 specifically — see the V2.10 backlog.

Mounting and board outline

The MDD400 V2.9 board has a non-rectangular outline shared with the WTI400 V1.2 sister product (both fit the same housing concept). Board extent and mounting-hole pattern:

ParameterValue
Board outlineNon-rectangular with rounded corners (~2.4 mm radius) and a step on the right-hand edge for the enclosure interface
Board extent (KiCAD coordinates)x: 66.4–161.6 mm, y: 42.4–137.6 mm
Mounting hole pattern60.2 × 89.2 mm rectangular pattern
Hole position (mm)Location
(83.9, 45.4)Top-left corner
(83.9, 134.6)Bottom-left corner
(144.1, 45.4)Top-right corner
(144.1, 134.6)Bottom-right corner

Each hole has a 4.065 mm courtyard radius — consistent with M3 hardware plus standoffs. The four mounting holes engage the housing's panel-mount inserts; no additional mechanical retention is needed.

PCB Layout

The board is a 4-layer stack-up (F.Cu / In1.Cu / In2.Cu / B.Cu) of 1.6 mm total thickness on FR4 (ε_r 4.5, prepreg 0.1855 mm, core 1.1 mm), with ENIG finish and dark-blue epoxy solder mask plus white direct-print silkscreen on both sides. F.Cu and B.Cu are the signal / component layers; In1.Cu and In2.Cu are dedicated GNDREF power planes carrying a solid ground pour beneath the entire SMPS region (the "VST" zone, 66.4–88.3 × 42.4–82.8 mm), giving a low-impedance return and EMI shielding between the switching converters on F.Cu and any signals on B.Cu.

  • Grounding / via stitching. 195 GNDREF vias (0.3 mm drill) in the SMPS area (x 70–90, y 45–85 mm) stitch the F.Cu GNDREF pour to the In1.Cu and In2.Cu planes; all 1081 board vias use a uniform 0.3 mm drill / 0.6 mm size (0.15 mm annular ring).
  • Converter isolation. Each buck converter (U1, U6) is enclosed by a 0.4 mm copper-keepout moat on F.Cu + In1.Cu + In2.Cu so no external pour enters the cell; SW nodes are copper pours (not traces) to minimise inductance; ferrite beads FB1 / FB2 at x = 89 mm and FB4 at (71.1, 82.9) are the sole HF connections between the SMPS copper and the digital VCC / VDD and CAN domains.
  • Mask / silkscreen. Pad-to-mask clearance is 0.075 mm; soldermask is tented front and back; soldermask min width is not explicitly set (KiCAD default applies). Silkscreen marks and fiducials sit on these mask / silk layers — fiducials are bare-copper apertures in the mask for vision contrast.
  • DRC. The configured-rule DRC (KiCAD 10.0.1, default constraints) returns 0 violations, 0 unconnected items, 0 schematic-parity errors. Zone refill was not re-run from the CLI (--refill-zones unavailable in this build) — a GUI refill is recommended before tape-out.

Components

RefTypeLayerFunctionSource
S1Copper board ID MDD400_v2.9F.Cu copperPermanent product / variant identifiermdd400:Variant footprint
S2CE silkscreen markF.Cu silkscreenEU RED 2014/53/EU complianceSILKS:CE_3.5mm
S3RoHS / China EFUP silkscreenF.Cu silkscreenEU RoHS + China EFUP (4-year mark)SILKS:EFUP_RoHS_China_4
S4FCC silkscreen markF.Cu silkscreenFCC Part 15 complianceSILKS:FCC_3.5mm
S5Scadys logoF.Mask apertureManufacturer identity, 10 × 10 mmSILKS:scadys_logo_10x10.f-mask
S6Product-docs QR codeF.Cu silkscreenMachine-readable link to live docsmdd400:qr_docs.scadys.io_products_mdd400_10
S7UKCA silkscreen markF.Cu silkscreenUK Conformity AssessedSILKS:UKCA_3.5mm
S8Copyright silkscreenF.Cu silkscreen© 2025 GM Consolidated Holdings Pty LtdSILKS:Copyright
FID1Fiducial markerF.CuPick-and-place vision alignment, top-left pair0.5 mm copper, 1.5 mm mask opening
FID2Fiducial markerF.CuPick-and-place vision alignment, bottom-right pair0.5 mm copper, 1.5 mm mask opening
FID3Fiducial markerB.CuMirror of FID1 on the back0.5 mm copper, 1.5 mm mask opening
FID4Fiducial markerB.CuMirror of FID2 on the back0.5 mm copper, 1.5 mm mask opening

Testing & Verification

caution

V2.9 is a fabricated prototype. The marks and fiducials are present on the prototype board, but a few items need verification before the V2.10 production fabrication run.

Hardware bring-up (rig at the bench):

  • QR-code URL resolution — Scan S6 with a phone QR reader. Pass if the resolved URL matches the live docs URL exactly. (Earlier MDD400 hardware revisions had a docs.scadys.comdocs.scadys.io URL transition; the V2.9 schematic footprint reads docs.scadys.io but verify on the as-fabricated board.)
  • Compliance-mark legibility — Photograph each silkscreen mark under typical helm-position lighting. Pass if all marks (Scadys logo, CE, UKCA, FCC, RoHS / EFUP) are clearly readable and unambiguous at arm's length.
  • Copyright year currency — Confirm S8 reads the correct year for the production batch. Pass if it reads "© 2025" on the V2.9 prototype; refresh for later batches.
  • Pick-and-place fiducial recognition — Confirm at the start of the assembly run that the pick-and-place machine detects FID1–FID4. Pass if both F.Cu and B.Cu setups complete without operator override.

Gaps & next version

Before next production run

  • Solder mask min width — Not explicitly set in the KiCAD setup block, so the default applies. Confirm with the fab house against the 0.012 mm mask thickness specified in the stackup.
  • Finished copper weight — F.Cu / B.Cu are 0.0175 mm = 18 µm (≈ ½ oz) starting weight; ENIG adds a negligible ~0.075–0.12 µm Au. If the fab requires a minimum finished copper weight, confirm 0.5 oz + plating meets the requirement for the 1 A converter current.
  • DRC zone refill — DRC ran on the existing filled zones; the CLI build lacks --refill-zones. Run a manual zone refill in the KiCAD GUI before tape-out to confirm no fill changes.
  • Re-scan QR code URL — Confirm the deployed docs URL still matches the silkscreen QR (S6) on the V2.10 PCB before fabrication.

Next version (V2.10)

  • Compliance test reports — The CE, UKCA, and FCC silkscreen marks indicate design intent only. The actual test reports that authorise affixing those marks are part of the V2.10 compliance pre-screening campaign (CISPR 32 conducted emissions, FCC Part 15 radiated, RED 2014/53/EU harmonised standards). The marks must not be affixed on production boards until the reports are signed off.
  • Copyright year update — Refresh S8 to the V2.10 production year if it differs from 2025.
  • Stackup re-validation — No quantitative impedance / plane-pair-capacitance measurements have been taken on V2.9 specifically; re-validate against the prior-revision production data if the stack-up changes.

References

  • Power Supplies — the SMPS converters and VCC plane-pair this stack-up physically realises
  • ESP32 Module — the RF module whose pre-certification covers the board-level FCC mark, plus its antenna keep-out
  • Circuit Design Overview — the system-level stack-up rationale that this page realises physically
  • Sister-product reference: WTI400 V1.2 PCB Markings & Compliance — same board outline and stack-up; minor differences in board-identity and QR-code URL