Skip to main content

Tasks

Hardware version

CANBench TrueZ v1.2 — Schematic-stage refresh of the V1.1 fabricated prototype. V1.2 is electrically identical to V1.1 and carries the InvenTree-canonical component metadata; no V1.2 boards exist yet — testing and bring-up reference the V1.1 hardware.

Other versions: v1.1 — fabricated prototype (current)

Outstanding validation and clean-up work for the CANBench TrueZ, derived from the schematic / PCB / performance review evidence.

Validation (measurement)

TaskWhy
Golden-prototype VNA / tracking-generator sweepReplace the simulated correction curve with measured CM and DM transfer + cross-mode leakage across 150 kHz – 108 MHz. This is the headline outstanding item — the low-end correction is currently modelled, not measured.
Confirm CPWG Z₀The RF traces target ≈ 50 Ω (1.0 mm trace / 0.2 mm gap on 1.6 mm FR-4, design estimate ≈ 50–52 Ω). Confirm with a field solver or TDR.
Confirm cross-mode isolationMeasure the CM↔DM isolation against the transformer-balance floor (0.5 dB amplitude, 2° phase typ).

Marking / artwork (before next fabrication)

TaskDetail
Reconcile PCB version / variant stringsThe PCB part number (0C-1.1 … GRN), the S1 silk stamp (0C-1.2-SMA), and the SKU comment (…-BLK-A) disagree — settle one version/variant before production artwork.
Fix the QR-code domainSilk QR reads docs.scadys.com; the live domain is docs.scadys.io.
Resolve the S1/S6 silk courtyard overlapDRC flags the PCB-version and Copyright marking footprints overlapping at one point (cosmetic).
Update the PCB title blockThe .kicad_pcb title block still reads "CANBus LISN and CM Monitor" (CANBench-Duo clone title); update to "CANBench TrueZ CM/DM Noise Splitter" to match the schematic.

Notes

  • DRC on the V1.1 board is otherwise clean (0 unconnected, 0 schematic-parity); the single violation is the cosmetic silk overlap above.
  • TrueZ is fully passive — no firmware, no power-rail or thermal validation applies.